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Circuit reliability simulation using TMI2
Conference paper

Circuit reliability simulation using TMI2

Min-Chie Jeng, Cheng Hsiao, Ke-Wei Su and Chung-Kai Lin
Proceedings of the Custom Integrated Circuits Conference, 6658491
11/2013

Abstract

Electrical and Electronic Engineering
Using simulation to assess the impacts of various reliability mechanisms to circuit performance has become prevail for advanced technologies due to smaller headroom (=Vdd-Vth) and less design margins. This paper reviews existing circuit aging simulation approaches with focus on TMI. The limitations of aging models are also discussed so that reliability simulations can be executed more correctly with the right expectation. An example circuit under multi-waveform and multi-temperature stress is presented to illustrate reliability simulation flow through TMI. © 2013 IEEE.

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