Abstract
Integrated circuits generally involve many layers of metallization as semiconductor devices require different functions; otherwise, the devices' density increases. The intermetal dielectric (IMD) is deposited between metal layers to provide isolated capability to the device and separate the different metal layers, which are not necessary in conducting electricity. A good isolated capability will help the devices become more reliable and stable. The key problem in IMD layer is the occurrence of voids, which lead to electric leakage and cause wafer scrape. To overcome the void problem in the IMD process is difficult due to its complicated input-response relationship. In this study, the authors combined neural networks, genetic algorithms (GAs), and desirability function to optimize the IMD process. The implementation of the proposed approach was carried out in a semiconductor manufacturing company in Taiwan, and the results illustrated the practicability of the said approach. © 2008 IEEE.