摘要
The Softmax function is widely used in deep neural networks, but it poses hardware design challenges due to its exponential and division operations. This study compares training- and inference-oriented Softmax IC designs with approximate operations across many CMOS technology nodes. The proposed framework first employs a silicon-based DeepScaleTool to scale the reported metrics, including area, power, and throughput, thereby removing process-dependent issues. It then utilizes a normalized and unified efficiency index to perform the overall comparison. The results show that the base-2 approximation method yields designs with the highest efficiency, regardless of whether the IC is designed for training or inference. The proposed process-independent and unified-efficiency comparative study can reveal design insight and provide guidance for future Softmax IC design and improvement.