Abstract
This work investigates and compares the effects of forming a denuded zone (DZ) at (111) and (100) Si surface on the electrical characteristic of MOS devices with HfO x N y high-k gate dielectric. Devices with DZ (low defect region) treatment at Si surface exhibit better electrical characteristics, such as reduced gate leakage current, defect generation rate, and interface trap density, as well as increased time to breakdown than those of without DZ treatment. This improvement can be attributed to the decrease of the defects at Si surface. In particular, by introducing DZ at the Si surface, the (111)-surface-oriented Si substrate has demonstrated more significant improvement on electrical properties than the (100) one. © 2005 Elsevier B.V. All rights reserved.