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Comprehensively study of read disturb immunity and optimal read scheme for high speed HfOx based RRAM with a Ti layer
Conference paper

Comprehensively study of read disturb immunity and optimal read scheme for high speed HfOx based RRAM with a Ti layer

Heng-Yuan Lee, Yu-Sheng Chen, Pang-Shiu Chen, Pei-Yi Gu, Yen-Ya Hsu, Wen-Hsin Liu, Wei-Su Chen, Chen Han Tsai, Frederick Chen, Chen-Hsin Lien, …
Proceedings of 2010 International Symposium on VLSI Technology, System and Application, VLSI-TSA 2010, pp.132-133
2010

Abstract

Although a significant effort was made recently in the development of binary oxide based resistive memory (RRAM) [1,2], reliability issue is still the most concern, but less addressed [3,4]. By stressing the device in high resistance state (HRS) with constant voltage of the same bias polarity during SET process, the disturbed time is found to exhibit extreme low Weibull slope (∼0.3). This characteristic can drastically shrink the reliability margin for reading process [4]. Inserting a thin Al 2 O 3 between the transition metal oxide and bottom electrode was proposed previously to improve read disturb immunity at room temperature [4]. However, the effect of high temperature (125°C) on the read disturb of this stacked layer (HfOx/Al 2 O 3 ) has not yet been studied. © 2010 IEEE.

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