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Conditional threshold wear-leveling algorithm for multi-channel NAND flash memory
Conference paper

Conditional threshold wear-leveling algorithm for multi-channel NAND flash memory

Wen-Kai Hsieh and Hsi-Pin Ma
Proceedings of 2010 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2010, pp.147-150
2010

Abstract

Recently, NAND flash memory has become a widelyused data storage media. However, it has endurance problem that each NAND flash block has limited erase cycles. The first time erase failure usually occurs when a block has over 10K-100K erase cycles. Wear-leveling is a technique to solve this problem and extend the lifetime of a flash memory. In this paper, a conditional threshold wear-leveling algorithm fitting multi-channel architecture is proposed. The overall wear-leveling operation is separated and distributed to different channels. This reduces the runtime of the wear-leveling operation. The conditional threshold can reduce extra erase operations caused by wear-leveling when the flash memory is young. As the flash memory becomes older, the smaller threshold makes wear-leveling work more frequently to get more even erase cycle distribution. ©2010 IEEE.

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