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Construction of minimal delay Steiner tree using two-pole delay model
Conference paper

Construction of minimal delay Steiner tree using two-pole delay model

Li Yi Lin, Yi Yu Liu and Ting-Ting Hwang
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, Vol.2001-January, pp.126-131
2001
DOI: https://doi.org/10.1109/ASPDAC.2001.913292

Abstract

Computer science Cost function Delay effects Delay estimation Inductance Integrated circuit modeling Routing Steiner trees Topology Wire
In this paper, we study the construction of a Steiner routing tree for a given net with the objective of minimizing the delay of the routing tree. Previous researches adopt Elmore delay model to compute delay. However, with the advancement of IC technology, a more accurate delay model is required. Therefore, in this paper, we use the two-pole delay model to compute the cost function of a Steiner tree. Moreover, we propose a new algorithm to construct the Steiner tree. Our algorithm takes into consideration the net topology, the total wire length and the longest path from the source to sink. Experimental results show that our algorithm is very effective and efficient as compared to that used by Boese et al. (1995).

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