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Cost and benefit models for logic and memory BIST
Conference paper

Cost and benefit models for logic and memory BIST

Juin-Ming Lu and Cheng-Wen Wu
Proceedings -Design, Automation and Test in Europe, DATE, pp.710-714
2000

Abstract

Engineering (all)
We present cost and benefit models and analyze the economics effects of built-in self-test (BIST) for logic and memory cores. In our cost and benefit models for BIST, we take into consideration the design verification time and test development time associated with testability. Experimental results for logic BIST and memory BIST examples show that a threshold volume exists when BIST is profitable for the logic core under consideration - it is not recommended for a higher volume. However, BIST is a good choice for memory cores in general. © 2000 IEEE.

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