Abstract
The trend in semi-conductor manufacturing methodology is increasingly focused on accommodating the diverse chip structures designed by multiple integrated circuit (IC) designers over the past few decades. The chemical and physical properties during silicon fabrication vary tremendously among versatile IC products at the nanometer-scale. For example, many carefully designed heuristic repetitive operations on wafers of varying pattern densities are necessary during chemical-mechanical polishing (CMP) to ensure wafer quality, but this can negatively impact wafer throughput. In this study, artificial intelligence (AI) is used to manipulate the complex semi-conductor manufacturing for high wafer quality and quantity. One innovative approach involves hierarchical reinforcement learning (HRL) coupled with deep deterministic policy gradient (DDPG), applied to CMP process control. This method is compared to the traditional run-to-run exponentially weighted average (RtR-EWMA) controller. The simulation results demonstrate a notable enhancement of more than 10% in semi-conductor FAB production efficiency.