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Design and analysis of a double RESURF 700V LIGBT with quasi-vertical DMOSFET in junction isolation technology
Conference paper

Design and analysis of a double RESURF 700V LIGBT with quasi-vertical DMOSFET in junction isolation technology

Ying-Chieh Tsai, Jeng Gong, W.C. Chan, S.Y. Wu and C.H. Lien
Proceedings of the International Symposium on Power Semiconductor Devices and ICs, pp.147-150
2014

Abstract

This paper presents the analysis of the substrate leakage current to anode current ratio of the 700V n-type lateral IGBT with quasi-vertical DMOSFET (QVDMOS) fabricated with junction isolation technology. To improve the substrate leakage, a p-type buried layer (BLP) is inserted between the n-type drift region and the n-type buried layer (BLN). A junction isolated p-region, which is connected to the BLP layer, is used to separate the N+ anode and the P+ anode. The measurement results show that this structure successfully eliminated the substrate current as well as to ensure high breakdown voltage. Furthermore, due to the use of the quasi-VDMOS cathode cell, additional current path enables a reduction in the forward voltage drop. © 2014 IEEE.

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