Abstract
A novel wafer level chip scaled packaging (WLCSP) having the capability of the redistributing the electrical circuit is proposed herein to resolve the problem of assembling a fine pitched chip to a coarse pitched substrate. In the fan-out WLCSP, the chip is first attached to a specific 8" chip carrier, and then the trench between the chips are filled by the filler polymer. The solder bumps could be located on both the filler polymer and chip surface, but the fabrication of the fan-out WLCSP is similar to the conventional 8" WLCSP process. Because the packaging structure of the fan-out WLCSP differs from the conventional one, a series of coplanity and solder joint height experiment is conducted to verify the capability of mounting the said structure to the substrate. The experimental results indicated that the derivation of the fan-out WLCSP is approximated ±0.01 mm, which is acceptable in the surface mount technology of the substrate. Moreover, the nonlinear finite element (FE) method is applied to analyze the mechanical characteristics of the fan-out WLCSP. Moreover, both the solder joint reliability and the trace stress while the external thermal cycling loading is considered. The simulation result indicates that the distance between the solder joint and the edge of the chip and filler polymer was more sensitive than other the design parameters, and the said distance parameter would dominate the mechanical characteristic of the fan-out WLCSP. © 2006 IEEE.