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Design of 60-GHz low-noise amplifiers with low NF and robust ESD protection in 65-nm CMOS
Conference paper   Peer reviewed

Design of 60-GHz low-noise amplifiers with low NF and robust ESD protection in 65-nm CMOS

Ming-Hsien Tsai, Shawn S. H. Hsu, Fu-Lung Hsueh, Chewn-Pu Jou and Tzu-Jin Yeh
IEEE Transactions on Microwave Theory and Techniques, Vol.61(1), pp.553-561
2013

Abstract

Charge-device-model (CDM) CMOS electrostatic discharge (ESD) human-body-model (HBM) low-noise amplifier (LNA) transmission line pulse (TLP) V -band very fast transmission line pulse (VFTLP)
This paper presents two 60-GHz low-noise amplifiers (LNAs) with different electrostatic (ESD) protection schemes, including the diode-based and LC-based configurations. By codesigning ESD network and input matching, both LNAs are optimized for minimum noise figure (NF) while maintaining a similar gain. Compared with the conventional double-diode approach, the proposed LC-based design uses a high current capability spiral inductor and a high breakdown voltage metal-oxide-metal capacitor as effective bidirectional ESD protection, showing much improved ESD protection level and NF under reduced power consumption. The test results demonstrate an over 8-kV human-body-model ESD level and an over 13-A very fast transmission line pulse current level for charge-device-model ESD protection. The measured NF and power gain are 5.3 dB and 17.5 dB, respectively, at 58 GHz, under a power consumption of only 18 mW. To the best of our knowledge, the LC-based ESD-protected LNA demonstrates a highest ESD protection level with a lowest NF, compared with prior arts operating at similar frequencies. © 1963-2012 IEEE.

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