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Design of High-RA STT-MRAM for Future Energy-Efficient In-Memory Computing
Conference paper

Design of High-RA STT-MRAM for Future Energy-Efficient In-Memory Computing

Ming-Chun Hong, Yi-Hui Su, Guan-Long Chen, Yu-Chen Hsin, Yao-Jen Chang, Kuan-Ming Chen, Shan-Yi Yang, I-Jung Wang, Sk Ziaur Rahaman, Hsin-Han Lee, …
2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings
2023
DOI: https://doi.org/10.1109/VLSI-TSA/VLSI-DAT57221.2023.10134453

Abstract

Artificial Intelligence Computer Networks and Communications Computer Science Applications Hardware and Architecture Information Systems Electrical and Electronic Engineering
In contrast to the low-RA STT-MRAM for memory applications, high-RA (> 500 Ω-μ m2) STT-MRAM with high cell resistance (1 M Ω) is required to support energy-efficient in-memory computing beyond 10 POPS/W. Scaling the coercive magnetic field and cell dimension and increasing the MgO thickness are found critical for enlarging RA and write margin.

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