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Design of a process-insensitive digital controller for high-frequency DC-DC SMPS
Conference paper

Design of a process-insensitive digital controller for high-frequency DC-DC SMPS

Po-Hsiang Lan, Chun-Yen Tseng and Po-Chiun Huang
IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS, pp.484-487
2010

Abstract

To meet the growing demand for flexible and reliable power management functions, power conversion using digital signal processing techniques have attracted many attentions recently. In this paper, the design issues about the usage of digital control for switching-type power converter are addressed. Incorporated with the digital processing in the controller, the interface designs on the analog-to-digital converter (ADC) and the digital pulse width modulator (DPWM) are addressed as well. To achieve reliable performance in interfaces, a prototype chip gives a demonstration to the possibility for realizing a digitally-controlled power converter with high power efficiency and robust performance. © 2010 IEEE.

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