Abstract
This paper presents Elliptic Curve Cryptographic (ECC) engines for very constrained devices in ubiquitous security such as passive RFID tags. The proposed scheduling of atomic operations optimizes the EC scalar multiplication at a higher level of finite field arithmetic with improved resource arrangement. Our architecture of arithmetic unit (AU) and circular-shift-based register file (RF) realizes the scheduling effectively. Using 65nm process technology, the ECC engine can produce one scalar multiplication in 250ms with 10.5K gates. The area overhead is 1.23× to 1.54× smaller than other designs; the power of 4.68μW and energy of 1.17μJ is also the lowest. The comparison shows that our ECC engines outperform others in terms of cycles, area, power and energy. © 2014 IEEE.