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Design of low-noise CMOS MEMS accelerometer with techniques for thermal stability and stable DC biasing
Conference paper

Design of low-noise CMOS MEMS accelerometer with techniques for thermal stability and stable DC biasing

S.S. Tan, C.Y. Liu, L.K. Yeh, Y.H. Chiu, Michael S.-C. Lu and Klaus Y.J. Hsu
Proceedings of the Custom Integrated Circuits Conference, 5617382
2010
DOI: https://doi.org/10.1109/CICC.2010.5617382

Abstract

An integrated high-sensitivity CMOS MEMS capacitive accelerometer with thermal stability has been designed and demonstrated in this work. Issue of obtaining stable DC bias at input terminals is particularly addressed. Sensitivity of 595 mV/g is achieved in the accelerometer and the overall noise floor is 50 μg/√Hz, which corresponds to an effective capacitance noise floor of 0.024 aF/√Hz. The zero-g thermal variation is as low as 1.68 mg/°C. © 2010 IEEE.

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