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Development of simulation-approach for 3D chip stacking with fine-pitch array-type microbumps
Conference paper

Development of simulation-approach for 3D chip stacking with fine-pitch array-type microbumps

Chang-Chun Lee, Tzai-Liang Tzeng and Pei-Chen Huang
ICEP-IAAC 2015 - 2015 International Conference on Electronic Packaging and iMAPS All Asia Conference, pp.514-517
05/2015

Abstract

Assembly Equivalent material properties Finite element analysis Microbump Wafer level Underfill Electrical and Electronic Engineering
A robust finite element analysis (FEA) is beneficial to quality the microbump assembly by using process-flow technique and to estimate subsequent thermo-mechanical reliability of critical microbump in a whole 3D-ICs packaging structure. However, the foregoing simulation work is time-consuming and becomes difficult to obtain a converged numerical result while thousands of microbumps with an array-type need to be taken into account simultaneously. For this reason, this research proposed a simulated technique to introduce an equivalent material composed of microbumps and their surrounding underfill. The mechanical properties of above-mentioned equivalent material, including Young's modulus, Poisson's ratio, and coefficient of thermal extension are directly obtained applying a tensile load and giving a increment in temperature during FEA, respectively. The analytic results indicate that at least five microbumps at the outermost region of chip stacking structure need to be considered as an accurate stress/strain contour in concerned region is achieved.

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