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Dynamic Data Migration to Eliminate Bank-level Interference for Stencil Applications in Multicore Systems
Conference paper

Dynamic Data Migration to Eliminate Bank-level Interference for Stencil Applications in Multicore Systems

Wei Hen Lo, Yen Hao Chen and TingTing Hwang
SASIMI 2015 Proceedings, p.22
2015

Abstract

stencil computation;automatic transformation compiler framework;Dynamically scheduling parallel stencils;memory contention problem;DRAM memory;cooperative dynamic data migration method;dynamic scheduling stencils
A stencil computation repeatedly updates each point of a d-dimensional grid as a function of itself and its near neighbors. Modern automatic transformation compiler framework can generate efficient tiling parallel stencil codes. Dynamically scheduling parallel stencils significantly improves system performance. However, memory contention problem exacerbates because of less idling cores and more memory requests sent to the DRAM memory. Traditional OS page coloring method which partitions the memory pages in advance can not alleviate the memory contention in dynamic scheduling parallel stencils. To address this issue, we provide a new software/hardware cooperative dynamic data migration method by exploiting the update-and-reuse property of stencils. We notice that the OS page allocation needs to be aware of the flexibility for dynamic data migration in memory to eliminate the memory interference. Experimental evaluation in a 8-core x86 system shows that our method can improve the system performance by 7% as compared with dynamic scheduling stencils in 8-cores 4-memory banks system

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