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Dynamical Performance Enhancement of Synchronous Reference Frame Phase-Locked Loop by K-Factor Method
Conference paper

Dynamical Performance Enhancement of Synchronous Reference Frame Phase-Locked Loop by K-Factor Method

Surya Chandra Gulipalli, Srinivas Gude and Chia-Chi Chu
2021 IEEE International Future Energy Electronics Conference, IFEEC 2021
2021

Abstract

delayed signal cancellation (DSC) grid frequency harmonics Moving Average filter(MAF) Multiple delayed signal cancellation (MDSC) phase-angle. Phase-locked loop (PLL) Energy Engineering and Power Technology Electrical and Electronic Engineering Control and Optimization
Accurate and high-speed estimation of phase angles,frequency,and magnitude of a grid voltage is an important task in paving a good platform for a fast and reliable operation of grid monitoring,protection,and control systems. Usually,the Phase-locked loop (PLL) is widely used to serve this purpose. In recent years,there have been many attempts to design more advanced PLLs for three-phase applications to cope up with technological requirements of smart grid applications. This paper focuses on improving the speed of PLLs by designing controllers using the k-factor method instead of traditional Proportional and Integral (PI) methods. It also emphasizes the need to undergo a search space sweep to determine the optimal phase margin and the crossover frequency pair to enhance the performance of PLLs. Real-time simulation results can demonstrate the superior performance of the proposed method.

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