Abstract
3D integrated circuit (IC) structure could provide larger patterning areas by stacking the multi-planar chips, in which the electrical signals can be vertically conducted via through-silicon vias (TSVs). Thus, its advantages are lowered costs and reduced packaging space, size and weight. In this study, the TSVs are fabricated and characterized. Four through holes with a diameter of 70 μm on a silicon wafer are filled by nickel electroplating in supercritical CO2. The chip is cut for observation and examination of the cross-sectional view of the TSVs. The average electrical resistance across the TSVs was measured 0.01Ω. Then the fabricated TSVs can be applied a maximum current of 10 Amps continuously without burnout.