Abstract
A footprint-efficient and power-saving BEOL compatible 3D <sup>+</sup> IC carrying monolithic 3D stackable FinFETs (3D <sup>+</sup> FinFETs) and W interconnect were demonstrated by low thermal budget laser spike anneal technology (Tsub<400 <sup>o</sup> C) and body-nano-planarizing processes. The narrow single-grained Si fin structure with ultra-low defect surface were fabricated by anisotropic ICP plasma etching and surface modification processes. The thus fabricated sub-10 nm and high aspect ratio (HFin/WFin>7) 3D+ FinFETs exhibit steep subthreshold swing (S.S.∼65mV/dec.), record high driving current (I on per W <sub>Eff</sub> (W <sub>Eff</sub> =2H <sub>Fin</sub> +W <sub>Fin</sub> ): 386 μA/μm (n-type) and 352μA/μm (p-type)), and high I <sub>on</sub> /I <sub>off</sub> (>10 <sup>7</sup> ), envisioning next generation low-cost heterogeneously integrated IoTs and wearable electronics.