Abstract
As artificial intelligence applications expand in various domains, addressing challenges such as reducing memory size and latency of recognition has become crucial. This paper proposes HAF, a spike-based convolutional neural network accelerator that leverages the sparsity of the input signal to achieve data compression and computation acceleration. To reduce power consumption while classifying the CIFAR-10 dataset with VGG16, the proposed design skips computations for zero inputs. This will decrease the number of processing elements required to process zero-valued inputs within the accelerator and reduce 75.54% of input SRAM access. The TSMC 40nm library performance achieves 51.31 TOPS/W power efficiency and 1859.71 GOPS equivalent average throughput in 97% input sparsity ratio.