- Title
- High-speed C-testable bit-level systolic arrays for GF(2m) inversion
- Creators - without role
- C.-T. HuangC.-W. Wu - 國立清華大學電機資訊學院電機工程學系
- Publication Details
- Proc. 6th VLSI Design/CAD Symp., pp.136-139
- Identifiers
- 9957773952006774
- Academic Unit
- College of Electrical Engineering and Computer Science, National Tsing Hua University
- Language
- Traditional Chinese
- Resource Type
- Conference paper
Conference paper
High-speed C-testable bit-level systolic arrays for GF(2m) inversion
Proc. 6th VLSI Design/CAD Symp., pp.136-139
1995
Related links
Metrics
1 Record Views