Abstract
For better performance on charge-trapping(CT) flash device, tunneling layer stacks of nitrogen(N)-rich SiN/SiO 2 and low temperature(LT) N-rich SiN/SiO 2 are studied. The programming and erasing speeds of CT flash device are significantly improved by the tunneling layer stacks due to the lower conduction and valence band offsets of N-rich and LT N-rich SiN. The retention properties of CT flash devices with standard SiN trapping layer are satisfactory. © 2011 IEEE.