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Investigation of Field Plate Design and Gate Control Strategies for Monolithic Bidirectional GaN HEMTs in Vienna Rectifier Applications
會議論文

Investigation of Field Plate Design and Gate Control Strategies for Monolithic Bidirectional GaN HEMTs in Vienna Rectifier Applications

Chun-Hao Lai, Wei-Ting Hsu, Vito Argono, Po-Yen Huang, Haoran Wang, Xi Jei Lim, Shawn Shuo-Hung Hsu 和 Roy K.-Y. Wong
Proceedings of the International Symposium on Power Semiconductor Devices & ICs, 頁碼.581-584
IEEE
2026 IEEE 38th International Symposium on Power Semiconductor Devices and ICs (ISPSD) (Las Vegas, NV, USA, 24/05/2026–28/05/2026)
24/05/2026

摘要

Bidirectional Capacitance Design methodology Electric fields Field-plate GaN HEMTs Generative adversarial networks HEMTs Human factors Printing Switches Voltage Stress
This paper presents the design strategies and comprehensive characterization of 650-V rating monolithic bidirectional GaN HEMTs, designed for high-efficiency Vienna converters. To address the critical trade-off between breakdown robustness and switching losses, a systematic optimization of the field plate geometry was conducted. The optimized device demonstrates a robust blocking capability up to 650 V with an ultra-low leakage current density of < 0.04 μA/mm at 125 ℃, and achieves a significantly reduced output capacitance and storage energy. High-voltage step-stress tests up to 1000 V confirmed immunity to off-state stress-induced charge trapping and robust blocking behavior. Furthermore, dynamic switching characterization at 100 kHz was performed to assess both hard-switching and soft-switching stresses in the Vienna rectifier. Although an increase in dynamic on-resistance (R on,dyn ) was observed under dynamic stress, the device maintained stable on-state conduction without exhibiting any signs of R on,dyn instability. By leveraging established R on,dyn enhancement strategies developed for unidirectional p-GaN HEMTs, the on-state performance and stability can be further optimized for long-term reliability. In addition, a dual-side blocking (DSB) gate-control scheme is evaluated, showing that dual-gate biasing can be used to further reduce effective output charge and stored energy, providing an extra knob for efficiency optimization.

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