- Title
- Layout Effect of Polysilicon Wall Embedded in Shallow Trench Isolation Region on the Performance of High-k/Metal Gate PMOSFETs
- Creators - without role
- C. C. Lee - 國立清華大學工學院動力機械工程學系P. C. Huang
- Publication Details
- 16th International Nanotech Symposium & Exhibition (NANO KOREA 2018) 16th International Nanotech Symposium & Exhibition (NANO KOREA 2018)
- Identifiers
- 9957774315706774
- Academic Unit
- Department of Power Mechanical Engineering, College of Engineering, National Tsing Hua University
- Language
- Traditional Chinese
- Resource Type
- Conference paper
Conference paper
Layout Effect of Polysilicon Wall Embedded in Shallow Trench Isolation Region on the Performance of High-k/Metal Gate PMOSFETs
16th International Nanotech Symposium & Exhibition (NANO KOREA 2018) 16th International Nanotech Symposium & Exhibition (NANO KOREA 2018)
2018
Metrics
1 Record Views