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Low-Power Synthesis For Extended Finite State Machines
Conference paper

Low-Power Synthesis For Extended Finite State Machines

Chien-Jyh Liu and Shi-Yu Huang
Proc. of 12th VLSI/CAD Symposium
2001

Abstract

Extended Finite State Machines;EFSM;transition information
In this paper, we investigate the low-power synthesis for Extended Finite State Machines (EFSM). It is basedon the general dynamic power management concept [2], in which the redundant computation can be dynamicallydisabled to reduce the overall power dissipation. The contribution of this paper is mainly a systematicprocedure to identify almost maximum amount of redundant computation in a design given as an EFSM.There are two levels of redundant computation to be exploited - one is based on machine state information,while the other is based on the transition information. After the extraction of the redundant computation, a lowpowerarchitecture using input gating [9] is proposed to synthesize the final circuit. We tested the techniques on adesign computing a number's Montgomery Inverse. Experimental results show that 31% power reduction canbe achieved at the costs of 2% timing penalty and 16% area overhead.

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