Logo image
Low power design using dual threshold voltage
Conference paper

Low power design using dual threshold voltage

Yen-Te Ho and Ting-Ting Hwang
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, pp.205-208
2004

Abstract

In this paper, we will study the reduction of static power consumption by dual threshold voltage assignment. Our goal is, under given timing constraint, to select a maximum number of gates working at high-Vth such that the total power gain is maximized. We propose an maximum independent set based slack assignment algorithm to select gates for high-Vth. The results show that our assignment algorithm can achieve about 68% improvement as compared to results without using dual Vth.

Metrics

1 Record Views

Details

Logo image