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New Single-poly EEPROM with Cell Size down to 8F2 for High Density Embedded Nonvolatile Memory Applications
Conference paper

New Single-poly EEPROM with Cell Size down to 8F2 for High Density Embedded Nonvolatile Memory Applications

Kung-Hong Lee and Ya-Chin King
Digest of Technical Papers - Symposium on VLSI Technology, pp.93-94
2003

Abstract

A novel EEPROM memory cell with new program and erase operations fabricated by standard CMOS logic process is presented. The cell which consists of two N-Type MOSFET transistors in series is programmed by select gate controlled channel hot hole and erased by channel hot electron injection along with more than 10 5 cycles of endurance and 1000 hours of data retention at 150°C. Without an additional P-well or N-well serving as the coupling gate, the area of a bit can be as small as 8F 2 , the smallest area reported for single-poly EEPROM cells.

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