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Novel flash memory structure using sequential lateral solidified low temperature poly-Si technology
Conference paper

Novel flash memory structure using sequential lateral solidified low temperature poly-Si technology

H.T. Chen, S.I. Hsieh, Y.C. Chen, P.H. Tsai, C.L. Chen, C.J. Huang, J.X. Lin, C. Jason Chang and Y.C. King
IDW/AD'05 - Proceedings of the 12th International Display Workshops in Conjunction with Asia Display 2005, (2), pp.1011-1014
2005

Abstract

A novel field-enhanced flash memory device fabricated by sequential lateral solidified (SLS) low temperature poly-Si (LTPS) technology on glass substrate was investigated. The poly-Si protrusions at grain boundaries (GB) as a result of SLS process can be well-controlled and located along the width direction of the transistor. Protrusions at the grain boundaries are utilized as emitting source to achieve a flash memory device with low operation voltage (≤20V), fast program/erase time, and wide V th window by field-enhanced channel hot electron (FE-CHE) injection for programming and field-enhanced band-to-band hot hole (FE-BBHH) injection for erase.

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