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Novel methodology for transistor-level power estimation
Conference paper

Novel methodology for transistor-level power estimation

Shi-Yu Huang, Kwang-Ting Cheng, Kuang-Chien Chen and Mike Tien-Chien Lee
International Symposium on Low Power Electronics and Design, Digest of Technical Papers, pp.67-72
1996

Abstract

Transistor-level power simulators, which are more accurate than logic-level power estimators, have been popularly used to estimate the power dissipation of CMOS circuits. In this paper, we introduce a method which extends the Monte-Carlo approach for deriving the average power dissipation of a circuit using transistor-level power simulators. To reduce the simulation time, we propose a mixed-level extrapolation technique to speed up the convergence rate of the process, and thereby to achieve a good balance between simulation time and accuracy. Experimental results show that this is a promising method for deriving the accurate power dissipation of a circuit within reasonable time budget.

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