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On feasibility of HOY - A wireless test methodology for VLSI chips and wafers
Conference paper

On feasibility of HOY - A wireless test methodology for VLSI chips and wafers

Po-Kai Chen, Yu-Tsao Hsing and Cheng-Wen Wu
2006 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2006 - Proceedings of Technical Papers, pp.243-246
2007

Abstract

Hardware and Architecture Electrical and Electronic Engineering
As we enter the deep submicron age, it is getting harder for traditional test equipments to catch up with the increasing speed, pin count, and parameter accuracy of new products. The rapid growth of test cost for semiconductor chips and wafers thus has become a wide concern. To solve this issue, we propose HOY - a novel wireless test system. HOY is under development, but preliminary feasibility study has been done. In this paper we present some economics models and simulation results, which show that HOY will be much more cost-effective than traditional testers. © 2006 IEEE.

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