Abstract
A cell-based Digitally Controlled Oscillator (DCO) is a key cell-based Phase-Locked Loop (PLL) component for on-chip high-speed clock generation. Previous cell-based DCO still suffers from some drawbacks such as nonlinear DCO period profile, non-uniform time resolution, risks of output clock period gaps, etc. In this work, we overcome these drawbacks by using latch-based varactor cells. Post-layout simulation reveals that our DCO can guarantee a gapless output clock period range for all 5 process corners in the most extreme temperature range from -40 °C to 150 °C. At the same time, the time resolution is stable at 1ps across the entire clock period range.