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PEACH: A novel architecture for probabilistic combinational equivalence checking
Conference paper

PEACH: A novel architecture for probabilistic combinational equivalence checking

Shih-Chieh Wu and Chun-Yao Wang
IFIP VLSI-SoIC 2006 - IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip, pp.104-109
2006

Abstract

This paper describes an approximate approach for combinational equivalence checking. We propose an architecture such that a virtually-zero aliasing rate is obtained in a single-pass probability calculation. Furthermore, the aliasing rate can be easily configured in various precision by designers. We conduct experiments on a set, of ISCAS'85 benchmarks. Experimental results show that with virtually-zero aliasing rate, for example, 10 -74 , our approach is more efficient than those exact approaches.

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