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Room temperature deposited enhancement mode and depletion mode indium znic oxide thin film transistors
Conference paper

Room temperature deposited enhancement mode and depletion mode indium znic oxide thin film transistors

Yu-Lin Wang, W. Lim, L.N. Covert, T.J. Anderson, J. Lin, S.J. Pearton, D.P. Norton and F. Ren
ECS Transactions, Vol.13(3), pp.159-164
2008

Abstract

Engineering (all)
Enhancement mode and depletion mode indium zinc oxide (IZO) thin film transistors (TFTs) were fabricated on glass substrates using rf magnetron sputtering deposition at room temperature. Plasma enhanced chemical vapor deposited SiO <sub>2</sub> or SiN <sub>x</sub> was used as the gate insulator. The enhancement mode TFTs showed excellent pitch-off and the threshold voltage was 0.75 V. The drain current on-to-off ratio was >10 <sup>6</sup> . The maximum field effect mobility in the channel was 308 cm <sup>2</sup> .V <sup>-1</sup> .s <sup>-1</sup> . The depletion mode TFTs had a threshold voltage of-2.5V. The drain current on-to-off ratio was >10 <sup>5</sup> . The maximum field effect mobility in the channel was 14.5 cm <sup>2</sup> .V <sup>-1</sup> .s <sup>-1</sup> . ©The Electrochemical Society.

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