Scaling of tunnel oxide thickness for flash EEPROMs realizing stress-induced leakage current reduction

H. Watanabe; S. Aritome; G.J. Hemink; T. Maruyama; R. Shirota

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Conference paper

Scaling of tunnel oxide thickness for flash EEPROMs realizing stress-induced leakage current reduction

H. Watanabe, S. Aritome, G.J. Hemink, T. Maruyama and R. Shirota

Digest of Technical Papers - Symposium on VLSI Technology, pp.47-48

1994

Abstract

Electrical and Electronic Engineering

Through the use of a lower impurity concentration in the gate poly-Si and lowering the post-annealing temperature, a highly reliable tunnel oxide process-technology has been developed. This process could become a key technology to realize high reliable Flash and NAND E ² PROM cells of 64Mb and beyond.

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Title: Scaling of tunnel oxide thickness for flash EEPROMs realizing stress-induced leakage current reduction
Translated title: Scaling of tunnel oxide thickness for flash EEPROMs realizing stress-induced leakage current reduction
Creators - without role: H. Watanabe - Toshiba Corp
S. Aritome - Toshiba Corp
G.J. Hemink - Toshiba Corp
T. Maruyama - Toshiba Corp
R. Shirota - Toshiba Corp
Identifiers: 9957775948806774
Academic Unit: College of Semiconductor Research, National Tsing Hua University
Language: English
Resource Type: Conference paper
Publication Details: Digest of Technical Papers - Symposium on VLSI Technology, pp.47-48

Scaling of tunnel oxide thickness for flash EEPROMs realizing stress-induced leakage current reduction

Abstract

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