Abstract
In semiconductor manufacturing, it is difficult for engineers to control complicated and often imbanlanced heavily loaded production routes well. This study aims to propose a framework of segmented WIP control for the production routes to control and reduce cycle time effectively. Furthermore, Stan'ation Avoidance (SA) method is employed to maintain high utilization of the Capacity Constrained Resources (CCR) in light of low WIP situations. A simulation is designed and validated with a small-scale model based on real data collected in a wafer fab in Taiwan, The results demonstrated its qualified viability.