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SiP assembly and application using glass substrate with through vias
Conference paper

SiP assembly and application using glass substrate with through vias

Ra-Min Tain, Dyi-Chung Hu, Kai-Ming Yang, Yu-Hua Chen, Chih-Lun Wang, Cheng-Hsiung Wang, Ching Chang, Yan-Bin Chang, Zih-Yu Ciou, Han-Wen Hu, …
Proceedings of Technical Papers - International Microsystems, Packaging, Assembly, and Circuits Technology Conference, IMPACT, pp.281-284
12/2016

Abstract

Hardware and Architecture Control and Systems Engineering Electrical and Electronic Engineering
This paper is to present an assembly structure of system-in-package (SiP) module using the glass substrate with through-glass via (TGV) where the diameter of TGV is 100μm and the glass substrate is 200μm thick. The glass-substrate is first laminated with a dielectric material on the surface and in through vias; then drill through holes in the dielectric material inside the vias, respectively. The copper is later plated on the wall in the dielectric through hole and on the surface of the dielectric material. This method is called via-in-via (ViV). Two BGA packaged SRAM chips are mounted on the top side of ViV glass substrate to form a ViV SiP module where the two SRAM chips are connected in series with path-delay extraction circuits. The ViV SiP module is mounted on a PCB test board for the measurement of path delay to study the functional performance of the ViV TGV substrate.

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