Abstract
In this paper, we study the problem of block and I/O buffer placement in flip-chip design. The goal of the problem is to simultaneously minimize the total path delay and the total skew of all input/output signals. We present two simple yet effective algorithms for the problem. Bothalgorithms place blocks to minimize the total path delay, and place I/O buffers to minimize the total skew. As compared to an existing method [5], the experimental results show that both algorithms are able to get better placement solutions with improvement rates up to 65% and 77.5%, respectively, and run much faster.©2005 IEEE.