Logo image
Stacked Channel Transistors with 2D Materials: An Integration Perspective
Conference paper

Stacked Channel Transistors with 2D Materials: An Integration Perspective

Yun-Yan Chung, Bo-Jhih Chou, Wei-Sheng Yun, Chen-Feng Hsu, Shao-Ming Yu, Yu-I Chang, Chen-Yi Lee, Sui-An Chou, 柏勳 何, Aslan Wei, …
2024 IEEE International Electron Devices Meeting (IEDM)
12/2024

Abstract

Performance evaluation;Image color analysis;Image edge detection;Fingers;Field effect transistors;Logic gates;Nanoscale devices;Sulfur;Molybdenum;Protection

This report presents the first electrical demonstration of a stacked nanosheet (NS) FET with a monolayer MoS2 channel, utilizing a typical nanosheet release process prior to high- κ metal gate deposition. We demonstrate the fabrication of flat, two-stacked nanosheets with a monolayer MoS2 channel and a conformal HfOX/TiN gate stack. The stacked nanosheets exhibit good release behavior, allowing for an integration scheme that supports gate lengths of up to 250 nm. IMAX/IMIN ratios of ~1E5 and a subthreshold swing of ~220 mV/dec are reported. Additionally, for the first time, the integration of stacked two NS WSe2 and two NS MoS2 in the same structural FET is demonstrated using the NS release and high −κ metal gate conformal deposition process. The two channel materials represent typical PMOS and NMOS 2D materials, respectively.

Metrics

1 Record Views

Details

Logo image