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TCAD-Based Variability Analysis of Cylindrical NVDRAM and VNAND Architectures with 3D Multi-Granular Polycrystalline Ferroelectric-Dielectric Phases
Conference paper

TCAD-Based Variability Analysis of Cylindrical NVDRAM and VNAND Architectures with 3D Multi-Granular Polycrystalline Ferroelectric-Dielectric Phases

Bellala Sai Sampath, Sarita Yadav, Sourav De, Govind Bajpai, Anand Bulusu, Kai Ni and Nitanshu Chauhan
2026 IEEE International Reliability Physics Symposium (IRPS)

Abstract

Broadcasting Circuits CMOS process CMOS technology Dielectric phase Diodes ferroelectric phase Motion pictures Non-Volatile DRAM (NVDRAM) polarization switching Vertical NAND Voltage multipliers Capacitors Circuits and Systems Light Emitting Diodes
This work investigates the influence of random fluctuations and the interaction between randomly shaped dielectric (DE) and ferroelectric (FE) phases, modelled using Voronoi grains within the ferroelectric layer of cylindrical Metal-Ferroelectric-Metal (MFM) capacitors, Non-Volatile DRAM (NVDRAM), and vertical NAND FeFET structures. The study reveals: 1.) The inclusion of a DE phase introduces non-uniformity and leads to a reduction in the overall polarization of the FE layer. 2.) Larger Voronoi FE grain sizes show decreased variability (low \sigma / \mu ) in MFM capacitor performance. 3.) The presence of a DE phase induces additional variability in NVDRAM, causing a decrease in the bitline read margin for bit '0' and bit '1'. 4.) Despite DE phase introduction, NVDRAM retains a superior bitline read margin compared to conventional DRAM, even at 50% DE phase. 5.) The effect of the DE phase on the memory window characteristics (low and high \mathrm{V}_{\text{th}} ) of vertical NAND FeFET is also analyzed.

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