Abstract
A Programmable Phase Shifter is commonly used in a pulsed Radar SoC for controlling the timing of the transceiver. It creates a Phase-Shift Amount (PSA) proportional to a tuning code. In the heart of this design, a Generic Delay-Locked Loop (Generic DLL) is responsible for creating an arbitrarily specified delay. Even though process variation and VDD variation has been properly considered, the temperature variation is often harder to cope with. In this paper, we present a temperature tracking scheme for this purpose. Simulation results show that, the maximum phase error can be thereby reduced from 96ps at its peak down to only 12ps.