Logo image
Test and Calibration Methods for Process Variation of ReRAM-based Spiking Neural Networks
會議論文

Test and Calibration Methods for Process Variation of ReRAM-based Spiking Neural Networks

Po-Sheng Chiu, Chih-Yu Hsu, Chih-Tsun Huang 和 Jing-Jia Liou
Proceedings - International Test Conference, 頁碼.494-497
IEEE
2025 IEEE International Test Conference (ITC) (San Diego, CA, USA, 20/09/2025–26/09/2025)
20/09/2025

摘要

Accuracy Calibration compute-in-memory Linear systems Neuromorphic engineering redundancy reram test Resistance resistance variation Resistive RAM spiking neural network Spiking neural networks Transformers Mathematical Models Systematics
Spiking Neural Networks (SNNs) implemented with Resistive RAM (ReRAM) offer promising advantages in area and power efficiency due to their compatibility with compute-in-memory architectures. However, process-induced resistance variability in ReRAM cells poses a significant challenge to inference accuracy. To address this issue, we propose a test and calibration framework to maintain target model accuracy. The test flow employs systematic pattern generation and formulates a set of linear equations to estimate ReRAM cell resistances. Given the estimated resistance values, rows exhibiting large deviations are replaced using redundant rows to mitigate computational errors. Experimental results on Tiny ImageNet with a Transformer-based SNN demonstrate that the proposed calibration method improves inference accuracy by 2.3% and 4.2% with one and two redundant rows, respectively.

相關連結

指標

1 檢視次數

詳細資料

Logo image