Test generation for combinational iterative logic arrays

Conference paper

Proc. 3rd Int. Symp. on IC Design and Manufacturing (ISIC), pp.223-230

09/1989

Abstract

iterative;logic

Electrical And Electronics Engineering

1 Record Views

Title: Test generation for combinational iterative logic arrays
Creators - without role: C.-W. Wu - 國立清華大學電機資訊學院電機工程學系
Publication Details: Proc. 3rd Int. Symp. on IC Design and Manufacturing (ISIC), pp.223-230
Identifiers: 9810016263, 9789810016265; 9957776376906774
Academic Unit: College of Electrical Engineering and Computer Science, National Tsing Hua University
Language: Traditional Chinese
Resource Type: Conference paper