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Twin mode NV logic gates for high speed computing system on 16nm FINFET CMOS logic process
Conference paper

Twin mode NV logic gates for high speed computing system on 16nm FINFET CMOS logic process

Wei-Yu Chien, Tai-Min Wang, Yue-Der Chih, Jonathan Chang, Chrong Jung Lin and Ya-Chin King
Technical Digest - International Electron Devices Meeting, IEDM, pp.12.1.1-12.1.4
01/2018
Appears in  keyword about Physics

Abstract

Electronic Optical and Magnetic Materials Condensed Matter Physics Electrical and Electronic Engineering Materials Chemistry
A twin-mode non-volatile logic gates allowing multiple logic functions to be obtained by controlling its non-volatile states is proposed for the first time. This floating metal gate based cell consisting of an inverter controlled by slot contact inputs is successfully demonstrated by standard FinFETs processes in a 16nm technology node. This new twin-mode gates can not only enable reconfiguration capability for logic systems at a gate level, but also prompt the realization of tunable ring oscillators, for multi-functional IOT applications.

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