Vth adjustable self-aligned embedded source/drain Si/Ge nanowire FETs and dopant-free NVMs for 3D sequentially integrated circuit

Chih-Chao Yang; Jia-Min Shieh; Tung-Ying Hsieh; Wen-Hsien Huang; Hsing-Hsiang Wang; 昌宏 沈; Tsung-Ta Wu; Chun-Yuan Chen; Kuei-Shu Chang-Liao; Jung-Hau Shiu; Meng-Chyi Wu; Fu-Liang Yang

doi:10.1109/IEDM.2014.7047063

Conference paper

Vth adjustable self-aligned embedded source/drain Si/Ge nanowire FETs and dopant-free NVMs for 3D sequentially integrated circuit

Chih-Chao Yang, Jia-Min Shieh, Tung-Ying Hsieh, Wen-Hsien Huang, Hsing-Hsiang Wang, 昌宏沈, Tsung-Ta Wu, Chun-Yuan Chen, Kuei-Shu Chang-Liao, Jung-Hau Shiu, …

2014 IEEE International Electron Devices Meeting

12/2014

DOI: https://doi.org/10.1109/IEDM.2014.7047063

Abstract

Silicon;Logic gates;Three-dimensional displays;Integrated circuits;Nanoscale devices;Nonvolatile memory;Lasers

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Title: Vth adjustable self-aligned embedded source/drain Si/Ge nanowire FETs and dopant-free NVMs for 3D sequentially integrated circuit
Creators - without role: Chih-Chao Yang - National Institutes of Applied Research
Jia-Min Shieh
Tung-Ying Hsieh - National Institutes of Applied Research
Wen-Hsien Huang - National Institutes of Applied Research
Hsing-Hsiang Wang - National Institutes of Applied Research
昌宏沈
Tsung-Ta Wu
Chun-Yuan Chen - National Tsing Hua University
Kuei-Shu Chang-Liao
Jung-Hau Shiu - National Tsing Hua University
Meng-Chyi Wu
Fu-Liang Yang - Research Center for Applied Science, Academia Sinica
Publication Details: 2014 IEEE International Electron Devices Meeting
Identifiers: 9957768658006774
Academic Unit: College of Semiconductor Research, National Tsing Hua University
Language: English
Resource Type: Conference paper

Vth adjustable self-aligned embedded source/drain Si/Ge nanowire FETs and dopant-free NVMs for 3D sequentially integrated circuit

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