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iScan: Indirect-access scan test over HOY test platform
Conference paper

iScan: Indirect-access scan test over HOY test platform

Chao-Wen Tzeng, Chun-Yen Lin, Shi-Yu Huang, Chih-Tsun Huang, Jing-Jia Liou, Hsi-Pin Ma, Po-Chiun Huang and Cheng-Wen Wu
2009 International Symposium on VLSI Design, Automation and Test, VLSI-DAT '09, pp.60-63
2009

Abstract

HOY test platform Indirect-access testing Scan test Test compression Hardware and Architecture Control and Systems Engineering Electrical and Electronic Engineering
In this paper, we introduce a new test paradigm called indirect-access scan test, demonstrated over the HOY test platform [12]. Unlike the traditional ATE-based testing, the test data in this paradigm are sent to the chip under test via packets over a single indirect channel. Although there is extra test time overhead for establishing the store-and-forward communication, it offers almost unlimited test memory - a highly desirable property since the large volume of test data today could easily blow up a traditional ATE's test memory. In addition to demonstrating the feasibility of this new paradigm, we also show that its efficiency can be substantially improved by two schemes; i.e., primary input (PI) data encoding and dynamic packet formatting. For a design with 155K gates, the speed-up achieved can be more than 50X. © 2009 IEEE.

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