摘要
NP3 (Non-exact Projective NPNP)-Boolean matching problem has various applications, e.g., library binding, engineering change order (ECO), and hardware Trojan detection. However, existing NP3-Boolean matching algorithms have not considered multi-bit input and output ports, which are prevalent in modern IC designs. These multi-bit ports can provide additional information for the NP3-Boolean matching process. In this paper, we propose an efficient approach to deal with NP3-Boolean matching problem, which leverages the information of multi-bit input and output ports for accelerating the matching process. We also participated in Problem A of the 2023 CAD Contest@ICCAD with this approach. The revised version of our program achieves higher scores than the1ˢᵗplace team of the Contest. Furthermore, our approach only requires59 %of CPU time as compared to the1ˢᵗplace team on average considering the benchmarks that achieve the optimal result.