摘要
Artificial intelligence has advanced significantly across various fields, primarily driven by Deep Neural Networks (DNNs). The core computation in these networks is the Multiply-Accumulate (MAC) operation. However, the conventional Von Neumann architecture, which separates computing units and storage, creates data movement bottlenecks during model inference. To overcome these challenges, we propose a novel hybrid SRAM-RRAM Computing-In-Memory (CIM) architecture that combines SRAM and RRAM structures through peripheral circuits. This architecture facilitates efficient MAC operations, achieving high parallelism and reducing energy associated with data transmission. Leveraging the reliability of SRAM and the high-density advantages of RRAM, coupled with our Weight Storage Strategy (WSS) approach, we strategically allocate weight storage based on weight bit importance. The Most Significant Bits (MSBs) reside in SRAM for reliability, while the Least Significant Bits (LSBs) utilize high-density RRAM for efficient storage. Our architecture can be tailored to optimize reliability in various DNN applications. Experimental results show that the proposed hybrid CIM architecture can reduce area, dynamic power, and leakage power by 35%, 40%, and 50% compared to SRAM-based CIM architecture, while the prediction accuracy of 10,000 MNIST dataset with 3-layer MLP can be improved by 32 % compared to RRAM -based CIM architecture.