摘要
Testing plays a crucial role in ensuring the quality and reliability of integrated circuits by detecting manufacturing defects during the production process. One widely used testing technique is the Good-die-in-bad-neighborhood (GDBN) method, which identifies defective dies on wafers by analyzing their spatial relationships. Since defects often cluster or follow specific patterns, the GDBN method effectively captures these spatial patterns, aiding in predicting potential manufacturing defects. Although recent studies have applied deep neural networks (DNNs) to GDBN to enhance prediction performance, an accompanying huge computational cost makes it hard to be practical on real industry designs. In this paper, we propose a GPU-accelerated DNN framework for the GDBN method, FastGDBN, to increase the testing throughput. By applying a specific feature map arrangement strategy, FastGDBN significantly improved the parallel inference capability of the model for predicting multiple dies on a wafer simultaneously. To the best of the authors' knowledge, this is the first approach to reduce the inference time complexity to linear order with respect to the number of wafer maps, while also leveraging DNNs to learn wafer-level yield distribution patterns. Extensive experiments on the real-world WM-811K dataset demonstrate that FastGDBN can not only outperform existing methods with a gain improvement of up to 2.6x but also achieves 5,428x speedup.